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Memory architecture
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#	Item
871	The SAFE Machine An Architecture for Pervasive Information Flow Benjamin C. Pierce University of Pennsylvania Add to Reading List Source URL: www.cis.upenn.edu Language: English - Date: 2013-06-28 12:49:10 Software bugs Pointer Kernel Memory protection C 64-bit Memory safety Linux kernel Computing Software Memory management
872	On the Efficiency of Atomic Multi-Reader, Multi-Writer Distributed Memory Burkhard Englert1 , Chryssis Georgiou2 , Peter M. Musial3 ? , Nicolas Nicolaou4 , and Alexander A. Shvartsman4 ?? 1 Add to Reading List Source URL: www.cs.ucy.ac.cy Language: English - Date: 2009-09-29 15:50:28 Computing Computer architecture Quorum Linearizability Transmission Control Protocol Non-blocking algorithm Replication DEC Alpha Transaction processing Concurrency control Data management
873	INDEX A Analog digital converter, 460 Andrew file system, [removed] Add to Reading List Source URL: www.cs.vu.nl Language: English - Date: 2001-02-14 14:40:56 Virtual memory Operating system Memory-mapped file File system NTFS Device file Scheduling IBM System/36 Paging Computing Computer architecture System software
874	Secure Virtual Architecture: Using LLVM to Provide Memory Safety to the Entire Software Stack John Criswell, University of Illinois Andrew Lenharth, University of Illinois Dinakar Dhurjati, DoCoMo Communications Laborato Add to Reading List Source URL: llvm.org Language: English - Date: 2010-02-25 20:20:06 Programming language implementation Procedural programming languages Microsoft Research Microsoft operating systems Pointer Dangling pointer C Memory safety Singularity Software Computing Software bugs
875	A Detailed GPU Cache Model Based on Reuse Distance Theory Add to Reading List Source URL: www.cedricnugteren.nl Language: English - Date: 2014-01-13 21:36:30 Cache Parallel computing Central processing unit Graphics hardware Video cards CPU cache CUDA Scratchpad memory Multithreading Computer hardware Computing Computer architecture
876	BMDFM: A Hybrid Dataflow Runtime Parallelization Environment for Shared Memory Multiprocessors Oleksandr Pochayevets Add to Reading List Source URL: bmdfm.de Language: English - Date: 2006-03-31 10:48:37 Computer architecture Computing Parallel computing BMDFM
877	Advanced Micro Devices ___________________________________________________________ AMD Opteron™ Processor Product Data Sheet • Compatible with Existing 32-Bit Code Base Add to Reading List Source URL: www.orpheuscomputing.com Language: English - Date: 2009-07-22 06:05:13 Computer buses Opteron CPU cache X86 DDR SDRAM SSE2 Synchronous dynamic random-access memory HyperTransport Comparison of AMD processors Computer architecture Computer hardware Computing
878	PIXELFLOW ™ RASTERIZER FUNCTIONAL DESCRIPTION John Eyles Steven Molnar Department of Computer Science Add to Reading List Source URL: www.cs.unc.edu Language: English - Date: 1998-04-29 09:54:46 Concurrent computing Shader Framebuffer Rasterisation Synchronous dynamic random-access memory Microcode FIFO Computer graphics Computing Computer architecture
879	Request for Information: Using Neural Tools to Augment Prediction of Performance, Expertise, and Domainknowledge (UNTAPPED) Synopsis The Intelligence Advanced Research Projects Activity (IARPA) is seeking information on Add to Reading List Source URL: www.iarpa.gov Language: English - Date: 2014-08-01 13:16:35 Attention-deficit hyperactivity disorder Neuroscience Cognitive architecture Problem solving Intelligence quotient Psychology Executive functions Affect Working memory Mind Cognitive science Ethology
880	System Management Bus As the first Intel microprocessor to incorporate a system management bus interface, the Pentium® II Xeon™ processor adds several manageability functions to the Intel product line. Inside the cart Add to Reading List Source URL: www.orpheuscomputing.com Language: English - Date: 2009-07-22 06:44:19 Computer memory Microprocessors X86 architecture Intel Core Xeon Pentium II Platform Environment Control Interface Read-only memory Multi-core processor Computer hardware Computing Electronic engineering

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